There are two major types transistors known as BJT(Bipolar Transistor) and FET(Field Effect Transistor). The FET transistors can be further classified as JFET(Junction Field Effect Transistor) and MOSFET(Metal Oxide Field Effect Transistor). Here the working principle of JFET transistor is explained.
Structure of JFET
There are two types of JFET, N-Type JFET and P-Type JFET. In N-type JFET the charge carrier are electrons while in case of P-type JFET the charge carrier are holes. The N-type JFET is constructed by diffusing two P-type material into N-type semiconductor bar as shown below.
In the above diagram, it has got three terminals. The terminal labelled GATE is connected to both the P-type material using ohmic contact. In the figure although the gate is shown to be connected to only one P-Type actually it is connected to both P-type. The other two terminal are interchangeable and are called Drain and Source depending upon where the power source terminal are connected to.
Below picture shows normal biasing of the JFET transistor.
The positive power supply terminal of VDDVDD is connected to one terminal and that end becomes the Drain(D). The negative power supply terminal is connected to other terminal which is called the Source(S). A negative reverse bias power supply is applied between the gate and the source using VGGVGG. For JFET operation it is necessary that the gate to source is reversed biased. As the gate to source is reversed biased the gate current IGIG is almost zero the input impedance is very high. This high input impedance is the major advantage of JFET transistor. It is due to this reason JFET are used as source follower(like BJT emitter follower).
The JFET input resistance can be calculated using the following formula.
Rin=VGSIGRin=VGSIG
The conventional current which is the drain current IDID flows from drain to the source due to VDDVDD. The actual flow of electron is from the source to drain. As can be seen from the above diagram, the electron flow must pass through the channel between the two p-type region. If the channel gets narrow then number of electron flow gets smaller and the drain current is reduced. The width of the channel is controlled using the gate voltage. If the gate to source voltage gets more negative, then the depletion region created between the n-type and p-type increases and blocks the flow of electrons. Because the current flow is controlled using the gate voltage, a JFET is called voltage controlled device and field effect transistor.
When the gate to source voltage is zero then maximum amount of drain current flows. This is the reason why JFET are called normally on device. As the gate to source voltage gets more negative, depletion region expands into the channel and drain current becomes lesser. At certain gate to source voltage the depletion region touches each other and the conducting channel is shut down and there is no drain current.
Drain Curve and Transconductance Curve
There are two main graphs to study the behavior of JFET transistor which are called drain curve and transconductance curve.
Drain Curve
The drain characteristic curve of a JFET is the graph plot of drain current IDID vs drain to source voltageVDSVDS. Consider the following circuit where the gate to source voltage is zero(VGS=0VGS=0) by just connecting the gate terminal to ground.
We can draw the drain curve by increasing the drain to source voltage VDSVDS from zero by varying the source voltage VDDVDD and tracing the drain current IDID which is shown below.
As we can see, when the drain to source voltage VDSVDS is increased from zero(point A), the drain current IDID increases linearly upto the point B. After this, further increase in VDSVDS produces no significant increase in IDID and IDID is constant upto point C. After point C the IDID increases abruptly. The region from point A to point B where the IDID increases linearly with applied VDSVDS is called Ohmic region. In this ohmic region, the channel resistance is constant and the JFET acts as a resistor. The VDSVDS voltage at point B after which the drain current is constant is called the Pinch-off voltage(VpVp). The region from point B to C where the drain current IDID does not increase with increase of VDSVDS is called the Active region. The value of IDID in the active region where JFET produces constant current is called Drain to Source current with gate Shorted denoted by IDSSIDSS. The value of Pinch-off voltage(VpVp) and Drain to Source current with gate Shorted IDSSIDSS are always specified in the datasheet. With further increase in VDSVDS the JFET can enter the point after C into the breakdown region. When operated in the breakdown region the JFET will be damaged. Therefore JFET are operated either in the ohmic or active regions.Family of drain characteristic curves
Consider the following circuit diagram where bias voltage VGGVGG is applied to the gate. This voltage VGGVGG will vary to gate to source VGSVGS.
By varying voltage VGGVGG or VGSVGS, we get family of drain characteristics curves which is shown below.
As we increase the reverse bias, that is, if we make VGSVGS more negative the drain current IDID decreases. At a value certain value of VGS=VGS(off)VGS=VGS(off) the drain current IDID becomes zero, that is there is no more drain current flowing. At this drain to source voltage cutoff voltage, VGS(off)VGS(off), the depletion region region overlaps and the channel is completely closed. The following figure illustrates this.
Transconductance Curve or Transfer Characteristics Curves
The transconductance curve of a JFET is a graph of IDID vs VGSVGS. The transconductance curve is important because it shows the relation between the input voltage VGSVGS and the output current IDID. That is why it is also called transfer characteristic curve. The transconductance curve of a JFET is shown below.
In transconductance curve, the end points are the VGS(off)VGS(off) on the VGSVGS axis and IDSSIDSS on the IDID. The equation for the above transconductance curve is,
ID≃IDSS(1−VGSVGS(off))2ID≃IDSS(1−VGSVGS(off))2
This tranconductance equation is useful to calculate IDID for given value of VGSVGS. The IDSSIDSS and VGS(off)VGS(off) are provided in the datasheet. The JFET are called squared law device because of the squared quantity in the above equation.
Application of JFET transistor
JFET transistor are used as variable switches, amplifier, mixers, modulators, sample and hold circuits, operational amplifier etc. Some example application tutorial are:
- AM modulator using JFET transistor
- AM modulator design with Two JFET transistor
.To use JFET transistor in various application circuit, often biasing of JFET transistor is required. See JFET Biasing Worked Out Example Calculation to learn how to bias JFET transistor.