This tutorial explains with example calculation how to design common source with drain feedback enhancement MOSFET(Metal Oxide Semiconductor Field Effect Transistor) amplifier. For illustration purpose enhancement MOSFET 2N7000 transistor is used. We will also assume that the power supply is +5V. The tutorial explains how to calculate parameter K in mosfet, how select bias point or the operating point and how to calculate resistor values so that the circuit is biased on the selected operating point. The tutorial explains how to calculate the input and output impedance and how to use them to calculate the coupling capacitor. Finally it includes calculation to calculate the gain of the designed E-MOSFET amplifier.
The following shows circuit diagram of E-MOSFET common-source amplifier with drain feedback.
In the above circuit the resistor RF provides the negative feedback for biasing.
The following content of this tutorial.
1. Obtain DC operating point Q
2. Calculate resistor values at DC
3. Calculate input and output impedance
4. Calculate coupling capacitor values
5. Calculate Voltage Gain
6. Analysis & Result
7. Conclusion
8. Further recommendations
1. Obtain DC operating point Q
To bias the circuit with stable operating point Q at DC voltages and current, we perform DC analysis wherein we short the capacitors as shown below.
To bias the circuit, we need to know what the gate to source voltage,\(V_{GS}\), and the drain current,\(I_D\), must be such that it produces maximum swing for the output drain current . This is illustrated graphically below.
To find the operating point Q-point, we can draw the transconductance curve and then select Q point in the middle of the transconductance curve as illustrated above. For enhancement type MOSFET the drain current \(I_D\), for given gate to source voltage \(V_{GS}\) can be calculated using the following equation,
\(I_D=k(V_{GS}-V_{GS(th)})^2\) --------->(1)
Then using equation(1) we can calculate \(I_D\) for different voltages for \(V_{GS}\) between \(V_{GS(th)}\) and \(V_{DD}\) then draw the transconductance curve. We can place a load line such that it intersects the transconductance curve in the middle which gives maximum possible swing for the output current. The intersection point is the Q-point or the operating point. The circuit is then biased(resistor values calculated), such that the value of gate to source voltage \(V_{GS}\) and drain current \(I_D\) have the value of at the q-point.
However, in order to use equation(1) to plot the graph, we need to know the value of k and \(V_{GS(th)}\). \(V_{GS(th)}\) is the gate to source voltage at which drain current starts to flow.
How to find value of \(V_{GS(th)}\)?
From the datasheet of 2N7000 the minimum and maximum value of \(V_{GS(th)}\) is 0.8V and 3V respectively and the typical value is 2.1V.
So here we will use the typical value, \(V_{GS(th)}=2.1V\)
How to find value of k?
Rearranging the equation (1) above we get equation for k,\(k=\frac{I_D}{(V_{GS}-V_T)^2}\) --------->(2)
Since we know that \(V_{GS(th)}=2.1V\) we have to find out next the value of \(I_D\) for particular \(V_{GS}\). From the datasheet the drain curve is as follows,
From the 2N7000 datasheet graph, the drain current \(I_D\) is approximately 0.6A when \(V_{GS}=5V\) as indicated in the following graph.
So from the equation(2) we can calculate the value of k for the 2n7000 E-MOSFET as follows,
\(k=\frac{I_D}{(V_{GS}-V_T)^2}\)
or, \(k=\frac{0.6A}{(5V-2.1V)^2}\)
that is, \(k=71.34 \times 10^{-3} A/V^2\)
How to draw transconductance curve?
Now with knowledge of \(k=71.34 \times 10^{-3} A/V^2\) and \(V_{GS(th)}=2.1V\) we can find the drain current \(I_D\) for a given value of gate to source voltage \(V_{GS}\) using the equation(1). Some points are calculated below.
for \(V_{GS}=2.5V\), \(I_D=k(V_{GS}-V_T)^2 =71.34\times10^{-3}(2.5-2.1)^2=11.41mA\)
for \(V_{GS}=3V\), \(I_D=k(V_{GS}-V_T)^2 =71.34\times10^{-3}(3-2.1)^2=57.78mA\)
for \(V_{GS}=3.5V\), \(I_D=k(V_{GS}-V_T)^2 =71.34\times10^{-3}(3.5-2.1)^2=139.82mA\)
for \(V_{GS}=4V\), \(I_D=k(V_{GS}-V_T)^2 =71.34\times10^{-3}(4-2.1)^2=257.53mA\)
for \(V_{GS}=4.5V\), \(I_D=k(V_{GS}-V_T)^2 =71.34\times10^{-3}(4.5-2.1)^2=410.91mA\)
and for \(V_{GS}=5V\), \(I_D=k(V_{GS}-V_T)^2 =71.34\times10^{-3}(5-2.1)^2=599.96mA\)
With these points(\(I_D, V_{GS})\) we can plot the transconductance curve for the E-MOSFET 2N7000 as shown below.
2. How to calculate resistors values?
The resistors values are calculated for biasing the E-MOSFET at the Q-point where \(I_D=265mA\) and \(V_{GS}=4.15V\).
For the common-source amplifier with drain feedback we have,
\(V_{DD}=I R_D+V_D\) ------------>(3)
where, \(I\) is the total current from the supply.
\(I=I_F+I_D\) ------------>(4)
But \(I_F\) which is the current flowing into the feedback resistor \(R_F\) is essentially 0 because the gate current in mosfet is 0, that is \(I_G=0\) for mosfet transistors. Hence we can assume that \(I_D=I\) and the equation (3) becomes,
\(V_{DD}=I_D R_D+V_D\)
from which we can calculate the drain resistor,
\(R_D=\frac{V_{DD}-V_D}{I_D}\) ------>(5)
For drain feedback circuit, the voltage at the drain is,
\(V_D=I_F R_F+V_{GS}\) -------->(6)
and since \(I_F=I_G=0\) we have,
\(V_D=V_{GS}\) -------->(7)
We need \(V_{GS}=4.15V \) for q-point biasing estimated above. Hence from (7)
\(V_D=4.15V\)
With \(I_D=265mA\) and \(V_D=4.15V\) in equation(5) the drain resistor is,
\(R_D=\frac{5V-4.15V}{265mA}\)
that is, \(R_D=3.2 \Omega\)
The value of the feedback resistor does not make difference because there will be no current through it. Hence usually we select high value for this resistor such as 10MOhm. The DC biased common source with drain feedback E-MOSFET circuit with the calculated values is shown below.
3. Calculate input and output impedance
The next step is to calculate the input and output impedance because they are required for calculating the coupling capacitor values. For this we need to perform AC analysis. The ac equivalent circuit of common source with drain feedback is shown below.
The input impedance is calculated using the following formula,
\(Z_i = \frac{R_F+(r_d||R_D)}{1+g_m(r_d||R_D)} \) ---------->(8)
where,
\(r_d=\frac{\Delta V_{DS}}{\Delta I_D}\) is the output impedance of the MOSFET
Usually,
\(R_F >> r_d||R_D\) and therefore \(R_F+(r_d||R_D) \simeq R_F \) hence equation(8) can be written as,
\(Z_i \simeq \frac{R_F}{1+g_m(r_d||R_D)} \)
and also when \(r_d > 10 R_D\), then \(r_d||R_D \simeq R_D\) and therefore the input impedance is,
\(Z_i \simeq \frac{R_F}{1+g_m R_D} \) -------->(9)
In equation(9) \(g_m\) is the transconductance and is calculated using the formula,
\(g_m=2k(V_{GSQ} - V_{GS(th)})\) -------------->(10)
With \(k=71.34 \times 10^{-3} A/V^2\), \(V_{GSQ}=4.15V\) and \(V_{GS(th)}=2.1V\) calculated above we have,
\(g_m=2 \times 71.34 \times 10^{-3} (4.15V - 2.1V) \)
that is,\(g_m=292.49mS \)
With \(g_m=292.49mS \), \(R_F=10M\Omega\) and \(R_D=3.2\Omega\) we have using equation(9) output impedance as,
\(Z_i \simeq \frac{10 M\Omega}{1+292.49mS \times 3.2\Omega} \)
that is, \(Z_i \simeq \frac{10 M\Omega}{1+292.49mS \times 3.2\Omega}\simeq 5.16M\Omega \)
The output impedance is calculated using the formula,
\(Z_o = R_F||r_d||R_D \) ---------->(11)
Usually, \(R_F >> r_d||R_D \) and therefore we can write (11) as,
\(Z_o \simeq r_d||R_D \)
Also when \(r_d > 10 R_D\), then \(r_d||R_D \simeq R_D\) and therefore the input impedance is,
\(Z_o \simeq R_D \) -------->(12)
Since \(R_D=3.2\Omega\) thus, the \(Z_o \simeq3.2\Omega \)
4. Calculate coupling capacitor values
The input and output coupling capacitors should have reactance which is less than 10% of the input and output impedance at the frequency of interest. See the tutorial How to bias a BJT using voltage divider biasing where it is explained in details how to calculate the coupling capacitor.
Assume that the frequency of the input signal to the JFET source follower is 1KHz.
To calculate the input
coupling capacitor \(C_1\) we have
\(C_{1}=\frac{1}{2 \pi (f) (0.1) (Z_{i})}\)
With \(Z_i = 5.16M\Omega\)
\(C_{1}=\frac{1}{2 \pi (1kHz) (0.1) ( 5.16M\Omega)} = 0.3nF\)
Similarly the output coupling capacitor \(C_2\) is calculated using the formula,
\(C_{2}=\frac{1}{2 \pi (f) (0.1) (Z_{o})}\)
and with \(Z_o = 3.2\Omega\), the output coupling capacitor is,
\(C_{2}=\frac{1}{2 \pi (1 kHz) (0.1) (3.2\Omega)}\)
that is, \(C_{2}=0.049 \mu F\)
5. Calculate Voltage Gain
The voltage gain \(A_v\) can be calculated using the following formula,
\(A_v = -g_m(R_F || r_d || R_D)\) ---------->(13)
Usually, \(R_F >> r_d||R_D \) and if \(r_d > 10 R_D\), equation(13) can be approximated as,
\(A_v = -g_m R_D\) ---------->(14)
With \(g_m=292.49mS \) and \(R_D=3.2\Omega\),
\(A_v = -(292.49mS)(3.2\Omega)\)
that is, \(A_v \simeq - 0.93\)
The negative sign indicates that there is phase shift of 180 degree between input and output voltage. Also since voltage gain is less than 1 it indicates that the output signal is not amplified but diminished in this case.
6. Analysis & Results
The following is the complete circuit diagram of enhancement type MOSFET amplifier designed with common source and drain feedback configuration.
The following shows the voltage measurement of common source with drain feedback E-MOSFET amplifier.
The measured gate to source voltage \(V_{GS}\) is 4.12V while the calculated was 4.15V. The drain voltage is 4.55V whereas ideally drain voltage is same as the gate to source voltage \(V_{GS}=4.15V\).
Consider that the input signal has amplitude of 100mV and frequency of 1KHz then the input and output signal waveform on oscilloscope is shown below.
Thus the above common source with drain feedback E-MOSFET amplifier signal waveforms shows the output signal is 180 degree out of phase with respect to the input signal. Also the output signal amplitude is less than the input signal amplitude. This is as expected because for this circuit the voltage gain \(A_v\) is 0.93 as calculated above.
7. Conclusion
So in this way we have shown how to design a common source with drain feedback amplifier with enhancement MOSFET 2N7000 transistor. The DC and AC analysis were performed. We showed how to select the operating point and we showed how to calculate the resistor values to bias the transistor in the selected operating point(Q-point). We showed how to calculate the input and output impedances and how to calculate the coupling capacitor values.
In the design of the amplifier, the voltage gain has come out to be 0.93 which is less than 1. However for amplification we need voltage gain higher than 1. Therefore, the design should start by setting desired voltage gain first then move on to the biasing problem.
8. Further recommendations
The following are some recommended tutorials:
- How to bias JFET transistor?
- JFET Biasing Worked Out Example Calculation
- JFET with Two-Supply Source Bias
- How to design common source JFET Amplifier
- How to design Common Gate JFET Amplifier
