Enhancement MOSFET are usually biased either using drain feedback bias or voltage divider bias. The depletion MOSFET can be biased using zero bias, fixed bias, self bias, voltage divider bias, two supply bias but the enhancement MOSFET cannot be biased using zero bias and self bias. Here it is shown how to design enhancement MOSFET based amplifier using voltage divider biasing method with example worked out calculations and online calculator.
VDB Biased E-MOSFET Amplifier Circuit & Operation
The following shows the circuit diagram of enhancement MOSFET biased using voltage divider biasing circuit.
Here the 2N7000 N-channel enhancement MOSFET is used as an example. The DC supply is 5V. The voltage divider circuit is made up of the resistors R1 and R2 which sets the gate bias voltage so that the Q-point or the biasing point is located in the active region(also called saturation region). When biased in the active region(saturation region) the circuit is used as an amplifier. The drain resistor RD and the source resistor RS are used to bias the output current and voltages. The capacitor C1 and C2 are the input and output coupling capacitor. The signal applied is 100mV with frequency of 1kHz which is coupled to the amplifier gate via the input coupling capacitor CC1. The output is coupled to the load resistor RL using the output coupling capacitor CC2. The CB is the bypass capacitor for resistor RS.
Steps to design E-MOSFET amplifier using VDB method
1. Choose Q-point(the Bias Point)
The first step to bias the amplifier is to select bias point or the operating point in the active region of operation. Following shows the selected bias point.
The selected Q-point or the bias point is at,
VDSQ = 2V, IDQ =3.3mA at VGS=2.5V and VGS(th=2.1V
2. Select Drain Voltage
Let us choose VD=2.5V (should be greater than VDSQ = 2V)
3. Calculate Source Voltage
VS=VD−VDS
or, VS=2.5V−2V=0.5V
4. Calculate gate voltage
The gate voltage can be calculated using,
VG=VGS+VS
or, VG=2.5V+0.5V
that is, VG=3V
5. Calculate drain resistor
The drain resistor is,
RD=VDD−VDID
or, RD=5V−2.5V3.3mA=2.5V3.3mA
that is, RD=791.14Ω
6. Calculate the source resistor
The source voltage is given by,
VS=ISRS
since IS=ID, the source resistor is,
RS=VSID
or, RS=0.5V3.3mA
that is, RS=158.23Ω
7. Calculate voltage divider resistor
The gate voltage is given by the voltage divider rule as follows,
VG=R2R1+R2VDD
Rearranging we can write,
R1=R2(VDDVG−1)
Let R2=10kΩ
then, R1=10kΩ(5V3V−1)
that is, R1=6.67kΩ
8. Calculate Rd
Rd=RD||RL=RDRLRD+RL
Let, RL=1kΩ
or, Rd=791.14Ω×1kΩ791.14Ω+1kΩ
thata is, Rd=441.70Ω
9. Calculate device k,
k=ID(VGS−VGS(th))2
or, k=3.3mA(2.5V−2.1V)2=19.75mA/V2
10. Calculate transconductance gm,
gm=2k(VGS−VGS(th))
or, gm=2×19.75mA/V2(2.5V−2.1V)=15.80mS
11. Calculate voltage gain Av,
Av=gmRd
or,Av=5.8mStimes441.70Ω
that is, Av=6.98
12. Calculate input impedance Zi
Zi=R1||R2=R1R2R1+R2
or, Zi=6.67kΩ1×10kΩ6.67kΩ+10kΩ
that is, Zi=4kΩ
13. Calculate output impedance Zo
Zo=Rd
that is, Zo=441.70Ω
14. Calculate input coupling capacitor
The input coupling capacitor is,
CC1=12πf(0.1)Zi
or,CC1=12π(1kHz)(0.1)(4kΩ)
that is, CC1=398.09nF
15. Calculate input coupling capacitor
CC2=12πf(0.1)Zo
or, CC2=12π(1kHz)(0.1)(441.7Ω)
that is, CC2=3.61μF
16. Calculate bypass capacitor
CB=12πf(0.1)RS
or, CB=12π(1kHz)(0.1)(158.23Ω)
that is, CB=158.23μF
Results
The complete voltage divider biased enhancement MOSFET amplifier with the calculated component value is shown below.
Following shows the circuit voltage and current obtained using the calculated values in circuit simulator.Using Enhancement MOSFET Biasing And Amplifier Design Calculator