JFET Current Source Bias Worked Out Example

 JFET(Junction Field Effect Transistor) can be biased either in the ohmic region or in the active region. When biased in ohmic region the JFET acts as a resistor and is used in switching application. When biased in active region  the JFET acts as current source and used in amplification and mixing application. JFET is biased in ohmic region using fixed gate bias. JFET can be biased in active region using either self bias, voltage divider bias or two supply source bias. Here we will illustrate how to bias JFET in the active region using the current source bias. Current source bias is improved circuit for JFET with two supply source bias.

The circuit diagram for JFET current source bias is shown below.

 

The above circuit shows 2N5459 N-channel JFET biased with two supply source \(V_{DD}=+5V\) and \(V_{EE}=-5V\) and 2N3904 BJT transistor. The BJT NPN transistor provides fixed current to the JFET transistor. This BJT transistor is the current source and hence this type of biasing is called current source bias. The gate resistor \(R_G=1M\Omega\) is just used for any further adding of ac input signal. This is because the circuit is designed for operating in active region for using the circuit for amplying purpose. The gate current is zero with or without the gate resistor. So the gate resistor does not have any effect in the calculation involved for biasing. can simply be removed. This is explained in details in the tutorial how to bias JFET transistor?.

To bias the circuit using current source bias we have to calculate the drain current \(I_D\), drain resistor \(R_D\) and the emitter resistor \(R_E\). How to calculate these values is explained next.

First we have to find the drain current \(I_D\) for which we can use the transconductance equation or the Shockley equation which is given as,

\(I_D=I_{DSS}(1-\frac{V_{GS}}{V_P})^2\)  --------------->(1)

For calculating the drain current using the Shockley equation we need the drain saturation current value \(I_{DSS}\), the gate to source reverse bias voltage \(V_GS\) and and the pinch off voltage \(V_P\). For obtaining these values we can either refer to the JFET datasheet or plot the drain curve. We have shown how to obtain drain curve in Proteus Software in the previous tutorial import spice model in Proteus and draw JFET drain curve. The following shows the drain curve for the 2N5459 JFET drawn in Proteus Software.

 From the above graph, the drain saturation current \(I_{DSS}\) is 10mA and pinch off voltage \(V_P\) is 1.2V. 

Next we need to select the gate to source voltage, \(V_{GS}\). It is best to select \(V_{GS}\) in the mid point of 0V to \(V_{GS(off)}\) so that the output drain current has maximum swing between 0 and \(I_{DSS}\). This is shown graphically below,

Thus,

 \(V_{GS} =\frac{V_{GS(off)}}{2}=\frac{V_P}{2}=\frac{1.2V}{2}=0.6V\)

Using the values of  \(I_{DSS}=10mA\), \(V_P=1.2V\) and  \(V_GS =0.6V\) in the transconductance equation(1), we have,

\(I_D=I_{DSS}(1-\frac{V_{GS}}{V_P})^2\) 

or, \(I_D=10mA (1-\frac{(-0.6)}{(-1.2)})^2\) 

that is, \(I_D=2.5mA\) 

Once we know the drain current we can calculate the source resistor and drain resistor value.

Applying Kirchhoff's Voltage law(KVL) in the input circuit,

\(V_{EE}=I_E R_E+V_{BE}\)   ----------------------->(2)

from which the emitter resistor is,

\(R_E= \frac{V_{EE}-V_{BE}}{I_E}\)   ----------------------->(3)

Since the same drain current \(I_D\) flows into the emitter \(I_E\), 

\(I_D\) = \(I_E\)

With \(V_{EE}= -5V\), \(I_D=2.5mA\) and \(V_{BE}=0.7V\) we have from equation(6),

 \(R_E= \frac{5V-0.7V}{2.5mA}\) 

\(R_E=1.72 k\Omega \)

Similarly applying KVL in the output circuit we have,

\(V_{DD}=V_D+I_D R_D\)   ----------------------->(4)

which gives drain resistor value,

 \(R_D = \frac{V_{DD}-V_D}{I_D}\)  ---------------->(5)

Substituting values,

\(R_D = \frac{5V-2.5V}{2.5mA}\)

that is,  \(R_D = 1 k\Omega\)

The resulting circuit with the calculated drain and emitter resistor is shown below.

 The following shows the simulated result.

In this way we can bias JFET using current source bias. We have shown how to do this with example calculation where we used 2N5459 JFET. Such biasing is used to bias JFET transistor in active region. JFET are biased in active region when they are used as amplifier. Other application area includes mixer/modulators as illustrated in AM modulator using JFET transistor and AM modulator design with Two JFET transistors.